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Health Educator
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Pomona
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| Cal Poly Pomona seeks a dedicated Health Educator for the Care Center to champion student wellbeing through prevention, education, and compassionate support. As part of the Campus Health and Wellbeing Cluster, this role designs and implements health promotion programs, supports students in crisis, and advances holistic wellness initiatives across campus. Join a team committed to fostering a culture of care, empowerment, and student success. |
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Budget Analyst
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Pomona
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| The Budget Analyst I is essential to the College’s operations, with responsibility for fiscal and budgetary management in the Dean’s Office. This includes oversight of auxiliary and philanthropic foundation accounts, as well as accounts related to faculty research. Additional responsibilities include monthly reconciliation of purchase card statements (state, foundation, philanthropic), tracking expenditures, and providing back-up support for state accounts. The position also supports the Senior Budget Analyst currently serving the College. |
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Facilities Maintenance Mechanic
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Pomona
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| Join our team and play a key role in maintaining a safe, comfortable, and efficient campus environment. The Facilities Maintenance Mechanic is Responsible to perform general routine and preventative maintenance and repairs of the buildings’ mechanical equipment and associated apparatus including work on the utility infrastructure. Perform corrective and preventive maintenance on pumps, pump seals, pump bearings, motors, motor bearings and blower fan bearings, shaft alignments and air compressors. |
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Lecturer - EE 301: Digital Systems Design with HDL (Spring 2026)
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San Marcos
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| The Electrical & Computer Engineering Department at California State University San Marcos seeks a part-time lecturer for Spring 2026 to teach EE 301: Digital Systems Design with HDL. The course covers advanced topics in digital systems design. Utilizes register-transfer level tools for logic synthesis, simulation, and the implementation of digital circuits in field-programmable gate arrays (FPGAs). Includes the basic building blocks of FPGA programming, architecture, best design practices, error-free design, and optimizations of finite state machines and logic circuit performance. Incorporates top-down design using a hardware description language (such as VHDL), test bench development, and implementation of advanced digital design systems in the laboratory component. |
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Lecturer - EE 430: Integrated Circuits and VLSI Design Lab (Spring 2026)
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San Marcos
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| The Department of Electrical & Computer Engineering at California State University San Marcos seeks a part-time lecturer for Spring 2026 to teach Lab section of EE430: Integrated Circuits and VLSI Design. The course teaches the design and analysis of single-stage, multi-stage, and differential integrated circuit amplifiers, feedback circuits, operational amplifiers, filters, oscillators, output stages and power amplifiers. Digital circuit design at the transistor level. |